Nowadays, the factors of PCB design are becoming more and more complicated, such as clocks, skewers, impedance, detection, manufacturing process, etc. This often makes designers repeatedly carry out a large number of layout wiring, verification, and maintenance. The parameter constraint editor can compile these parameters into the formula, and assist the designers to better handle these parameters that sometimes they sometimes oppose each other in the design and production process.

     In recent years, the requirements for PCB layout wiring have become more and more complicated. The number of transistors in integrated circuits is still rising at the expected speed of Moore's Law, which makes the device faster and the increase time of each pulse rises. Come and more -often reach 500 to 2,000 tube feet. All of this will bring density, clocks, and bruises when designing PCB.

     A few years ago, most of the "critical" nodes (Net) on most PCBs usually refer to some constraints in impedance, length and gap. PCB designers generally first hand in hand to these wiring wiring , Then use the software to make a large -scale automatic wiring on the entire circuit. Today's PCB often has 5,000 or more nodes, and more than 50%of them are key nodes. Due to the pressure of listing time, it is impossible to use handmade wiring at this time. In addition, not only the number of key nodes has increased, but the constraints of each node are also increasing.

     These constraint conditions are mainly due to the increasingly complicated parameter correlation and design requirements. For example, the interval between the two wiring may depend on a function related to node voltage and line board materials. Digital IC rising time is reduced. The design of the high clock speed and the low clock speed will have an impact. Because the pulse produces faster, the establishment and maintenance time will be shorter. In addition, the important part of the interconnected delay as the total delay of the design of the high -speed circuit is also very important. wait.

     If the circuit board can be designed to be larger, some problems above will be easier to solve, but the current development trend is exactly the opposite. Due to the requirements of interconnected delay and high -density packaging, the circuit board is constantly becoming smaller, and high -density circuit design has occurred. At the same time, it must also follow miniaturized design rules. The decrease in rising time, coupled with these miniaturized design rules, makes the problem of stringing noise more and more prominent, and the ball grid arrays and other high -density packaging itself will also aggravate problems such as stringing, switching noise, and ground line rebound.

     The restrictions of fixed constraints

     The traditional method of dealing with these problems is to transform electrical and process requirements into fixed constraint parameters based on experience, default value, number tables, or calculation methods. For example, when the engineer design circuit may first determine a rated impedance, and then "estimate" a rated line width that can meet the required impedance according to the final process requirements, or use the calculation form or arithmetic program to test the interference, and then find the length constraints condition.

     This method usually needs to design a set of experience data as the basic guidance principle of PCB designers so that these data can be used when designing the wiring tool for automatic layout. The problem of this method is that empirical data is just a general principle. In most cases, they are correct, but sometimes they do not work or cause errors.

     Let's take a look at the examples that can be determined above to see the errors that may cause this method. Factors related to impedance include the electronics characteristics of the circuit board material, the height of the copper foil, the distance and line width between the layers to the ground/power layer. Since the first three parameters are generally determined by the production process, the designer is usually relying on the width of the line width. To control the impedance. Because the distance from the layer to the ground or the power layer is different, it is obviously wrong to use the same experience data for each layer. In addition, the production process or circuit board characteristics adopted during the development process may change at any time, so the problem will be more complicated.

     Most of the time, these problems will be exposed during the production of the prototype. Generally, it is solved by finding the problem after the problem is repaired or re -designed by the line board. This cost is relatively high, and the repair often brings additional problems and needs to be made for further debugging. Finally, the income loss is much higher than the debugging cost due to delaying the listing time. Almost every electronics manufacturer faces such problems, and eventually the traditional PCB design software cannot keep up with the actual situation of the current requirements for electrical performance. In this regard, it is not as simple as the experience data of mechanical design.

     Solution: Parameterization constraints

     At present, design software vendors are trying to solve this problem by increasing parameters on the constraints. The most advanced place is that it can explain in detail mechanical indicators that completely reflect various internal electrical characteristics. As long as it is added to the PCB design, the design software can use this information to control the automatic layout wiring tool.

     When the subsequent production process changes, the design does not need to be re -designed. The designer only needs to simply update the craft characteristic parameters to automatically change the relevant constraints. The designer can then run the DRC (design rules inspection) to determine whether the new process has violated other design rules, and find out what aspects that should be changed to correct all errors.

     The constraints can be entered in the form of mathematical expression, including constant, various operators, vectors, and other design constraints to provide designers with a parameterized rule -driven system. The constraints can even be entered in the form of a table check, and they are stored in the design files of PCB or schemes. The PCB wiring, the location of the copper foil area and the layout tools must follow the constraints generated by these conditions. DRC verifies whether the entire design meets these constraints, including the requirements of the width, interval and space (such as area and height limit).

     A very simple example is the rising time constraint. Generally, it is set to a constant 1.5ns. According to this condition, the restrictions of the maximum line length can be obtained, that is, the 5,800mil/ns multiplied by 1.5ns. A slightly complicated example is the component interval. It determines that the positive cut value of the detection angle is multiplied by the height of the device. This formula can calculate the minimum component interval value.